The present invention relates to a computer memory system and particularly to such a system for rapidly accessing program information.
In the high speed processor described and claimed in O'Leary U.S. Pat. No. 4,075,704, instructions are rapidly accessed from a high speed program source memory separate from the processor's main data memory for thereby enhancing the operating speed of the processor. While a separate program source memory can be highly advantageous so long as the program is relatively short in length, the cost of the program memory becomes excessive if a large program address space is required. One possible solution to this problem involves the transfer of a portion or block of the program to a fast cache memory for execution, followed by transfer of a second block, and so on. Cache memories of the prior art typically receive one or more blocks or pages of information at a time, each accompanied by a tag identifying that particular block or page.
Unfortunately, the program information which may be desired from memory over a given period of time may not all conveniently reside in the same block or page or in the same group of blocks or pages. In the case of instructions, for instance, a branch or jump may take place specifying a sub-routine outside the originally transferred block or blocks and requiring replacement of the cached information. A block of new information would then be written into cache for accessing the sub-routine, after which return would be made to the main line of the program. Most of the information transferred in the same block or page containing the sub-routine would never be used, and yet two complete block erasures and transfers are required. The use of each sub-routine must, of course, await the initial transfer of the entire block of information containing it. Transferring very short blocks of information to the cache, on the other hand, may not be much different from accessing the same information from main memory in the first place, and can have the additional disadvantage of failing to transfer program loops or repetitively used groups of instructions.